Собрал ядро из SDK сабжа. При попытке запустить в эмуляторе нет вывода на экран однако проц загружен на 100%. В чём может быть проблема и как установить её без вывода на экран?
Так я запускаю QEMU 4.
qemu-system-arm \
-kernel ./vmlinuc \
-initrd ./initrd.image \
-dtb ./hilink.dtb \
-cpu cortex-a9 \
-m 512 \
-M vexpress-a9 \
-no-reboot \
-serial stdio \
-append "rootfstype=ramfs console=ttyAMA0,115200" \
-smp 4
file vmlinuc
vmlinuc: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), statically linked, BuildID[sha1]=14ad8694d443f0a3f7b53d59af3a7334d701f6d8, not stripped
cat /proc/cpuinfo с девайса для которого ядро
processor : 0
Processor : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 1949.69
Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5
processor : 1
Processor : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 1959.93
Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5
processor : 2
Processor : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 1959.93
Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5
processor : 3
Processor : ARMv7 Processor rev 5 (v7l)
BogoMIPS : 1959.93
Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc07
CPU revision : 5
Hardware : bigfish
Revision : 0000
Serial : 0000000000000000
device tree сгенерирован на основе дампа procfs с девайса
/dts-v1/;
/ {
model = "Hisilicon";
compatible = "hi3798mv100-series";
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-parent = <0x1>;
soc {
compatible = "simple-bus";
device_type = "soc";
ranges = <0x0 0x0 0xffffffff>;
#address-cells = <0x1>;
#size-cells = <0x1>;
amba {
compatible = "arm,amba-bus";
ranges;
#address-cells = <0x1>;
#size-cells = <0x1>;
uart@0xf8b00000 {
reg = <0xf8b00000 0x1000>;
interrupts = <0x0 0x31 0x4>;
compatible = "arm,pl011", "arm,primecell";
clock-names = "apb_pclk";
clocks = <0x3>;
};
uart@0xf8b02000 {
reg = <0xf8b02000 0x1000>;
interrupts = <0x0 0x33 0x4>;
compatible = "arm,pl011", "arm,primecell";
clock-names = "apb_pclk";
clocks = <0x3>;
};
timer@0xf8a29000 {
reg = <0xf8a29000 0x20 0xf8a2a000 0x20 0xf8a2a020 0x20 0xf8a2b000 0x20 0xf8a2b020 0x20>;
interrupts = <0x0 0x1a 0x4 0x0 0x3b 0x4 0x0 0x1b 0x4 0x0 0x3c 0x4>;
compatible = "hisilicon,timer";
clock-names = "apb_pclk";
clocks = <0x2>;
};
uart@0xf8006000 {
reg = <0xf8006000 0x1000>;
interrupts = <0x0 0x32 0x4>;
compatible = "arm,pl011", "arm,primecell";
clock-names = "apb_pclk";
clocks = <0x4>;
};
};
hinfc610.NAND@0xf9810000 {
reg = <0xf9810000 0x100 0xfe000000 0x2176>;
compatible = "hi3798mv100.hinfc610";
clock-names = "clk";
clocks = <0x5 0x60>;
};
hi3798mv100.hiusbotg {
reg = <0xf9880000 0x10000 0xf9890000 0x10000 0xf8a20120 0x4>;
compatible = "hiusbotg";
device_time = <0x3e8 0x4>;
host_time = <0x5dc 0x4>;
};
ohci@0xf9880000 {
reg = <0xf9880000 0x10000>;
interrupts = <0x0 0x43 0x4>;
compatible = "generic-ohci";
clock-names = "clk";
clocks = <0x5 0xb8>;
};
ohci@0xf9920000 {
reg = <0xf9920000 0x10000>;
interrupts = <0x0 0x3f 0x4>;
compatible = "generic-ohci";
clock-names = "clk";
clocks = <0x5 0x198>;
};
himciv200.SD@0xf9820000 {
reg = <0xf9820000 0x1000>;
caps = <0x80000047>;
interrupts = <0x0 0x22 0x4>;
ldo-shift = <0x0>;
ldo-addr = <0xf8a2011c>;
compatible = "hi3798mv100,himciv200";
clock-names = "clk";
clocks = <0x5 0x9c>;
max-frequency = <0x5f5e100>;
};
himciv200.MMC@0xf9830000 {
reg = <0xf9830000 0x1000>;
caps = <0x80000847>;
interrupts = <0x0 0x23 0x4>;
compatible = "hi3798mv100,himciv200";
clock-names = "clk";
clocks = <0x5 0xa0>;
max-frequency = <0x5f5e100>;
};
xhci@0xf98a0000 {
reg = <0xf98a0000 0x10000>;
interrupts = <0x0 0x45 0x4>;
compatible = "generic-xhci";
clock-names = "clk";
clocks = <0x5 0xb0>;
};
ehci@0xf9890000 {
reg = <0xf9890000 0x10000>;
interrupts = <0x0 0x42 0x4>;
compatible = "generic-ehci";
clock-names = "clk";
clocks = <0x5 0xb8>;
};
ehci@0xf9930000 {
reg = <0xf9930000 0x10000>;
interrupts = <0x0 0x3e 0x4>;
compatible = "generic-ehci";
clock-names = "clk";
clocks = <0x5 0x198>;
};
hisilicon_clock {
reg = <0xf8a22000 0x200 0xf8a20000 0x848>;
#clock-cells = <0x1>;
compatible = "hi3798mv100.clock";
phandle = <0x5>;
linux,phandle = <0x5>;
};
hieth@f9840000 {
reg = <0xf9840000 0x4000>;
interrupts = <0x0 0x47 0x4>;
phy-handle = <0x6>;
compatible = "hisilicon,hieth";
clock-names = "clk";
clocks = <0x5 0xcc>;
#address-cells = <0x1>;
#size-cells = <0x0>;
hieth_phy@0 {
reg = <0x1>;
phy-gpio-bit = <0x0>;
phy-mode = "mii";
internal-phy;
mac-address = [00 00 00 00 00 00];
phy-gpio-base = <0x0>;
phandle = <0x6>;
linux,phandle = <0x6>;
};
};
hiudc@0xf98c0000 {
reg = <0xf98c0000 0x40000>;
interrupts = <0x0 0x44 0x4>;
compatible = "hiudc";
clock-names = "clk";
clocks = <0x5 0xb8>;
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
reg = <0x0>;
compatible = "arm,cortex-a7";
device_type = "cpu";
};
cpu@1 {
reg = <0x1>;
compatible = "arm,cortex-a7";
device_type = "cpu";
};
cpu@2 {
reg = <0x2>;
compatible = "arm,cortex-a7";
device_type = "cpu";
};
cpu@3 {
reg = <0x3>;
compatible = "arm,cortex-a7";
device_type = "cpu";
};
};
chosen {
bootargs = "console=ttyAMA0,115200 mtdparts=hinand:2M(boot),2M(bootargs),2M(deviceinfo),1M(nvram),6M(baseparam),6M(pqparam),6M(logo),20M(kernel),20M(backup_kernel),80M(rootfs),-(persistent) initrd=0x15200000,0x1902000 mem=512M mmz=ddr,0,0,256M";
};
clocks {
clk_3m {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x2dc6c0>;
clock-output-names = "clk3M";
phandle = <0x4>;
linux,phandle = <0x4>;
};
xtal_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x16e3600>;
clock-output-names = "clk24M";
phandle = <0x2>;
linux,phandle = <0x2>;
};
clk_83p3m {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x4f70ea0>;
clock-output-names = "clk83.3M";
phandle = <0x3>;
linux,phandle = <0x3>;
};
};
memory {
reg = <0x0 0x40000000>;
};
aliases {
net_phy0 = "/soc/hieth@f9840000/hieth_phy@0";
};
interrupt-controller {
reg = <0xf8a01000 0x1000 0xf8a02000 0x100>;
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x3>;
#address-cells = <0x0>;
phandle = <0x1>;
interrupt-controller;
linux,phandle = <0x1>;
};
}
cat /proc/devices
Character devices:
1 mem
5 /dev/tty
5 /dev/console
5 /dev/ptmx
10 misc
13 input
29 fb
90 mtd
108 ppp
116 alsa
128 ptm
136 pts
180 usb
189 usb_device
204 ttyAMA
218 himediaCharDev
254 bsg
Block devices:
1 ramdisk
259 blkext
7 loop
8 sd
31 mtdblock
65 sd
66 sd
67 sd
68 sd
69 sd
70 sd
71 sd
128 sd
129 sd
130 sd
131 sd
132 sd
133 sd
134 sd
135 sd
240 romblock
Могу выложить конфиг ядра и любую необходимую информацию. Заранее спасибо за помощь
