TIM1 захват входного сигнала

/* Start the timer counter */
TIM3->CR1 |= TIM_CR1_CEN;
/* Clear the Capture event flag for channel 1 */
TIM3->SR = ~TIM_SR_CC1IF;
/* Loop until the capture event flag is set */
while (!(TIM3->SR & TIM_SR_CC1IF));
/* An active edge was detected, so store the timestamp */
TimeStamp = TIM3->CCR1;

    Gpio.GPIO_Mode = GPIO_Mode_AF_PP;
    //Gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;

Gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;

#include ...

#define F_CPU_MHz       8
#define BAUDRATE        115200

uint32_t u32tod(uint32_t num, uint8_t *s) {
    uint8_t *p = s + 11;
    uint32_t i = 0, cnt = 0;
    do {  *(--p) = num % 10 + '0';  num /= 10;  cnt++;  } while (num);
    for (; i<cnt; i++) { s[i] = p[i]; };  s[cnt++] = '\n';
    return cnt;
}

void uart_send_blocking(uint8_t *s, uint32_t cnt) {
    while (cnt--) {
        while (!(USART1->SR & USART_SR_TXE));
        USART1->DR = *s++;
    }
}

int main() {
    RCC->APB2ENR = RCC_APB2ENR_USART1EN | RCC_APB2ENR_IOPAEN | RCC_APB2ENR_TIM1EN;

    /* Pins; PA8 is TI1, pulled low; PA9 is UART TX */
    CONFIGURE_PIN(GPIOA, 8, I_PULLED);
    CONFIGURE_PIN(GPIOA, 9, O_ALT_PUSH_PULL);

    /* Timer 1; CC2 captures on falling TI1; timer reset on rising TI1 */
    #define CC1S_IC1_ON_TI1     (0b01<<0)     /* CC1 as input capture on TI1 */
    #define CC2S_IC2_ON_TI1     (0b10<<8)     /* CC2 as input capture also on TI1 */
    #define FILTER_IC1          (0b1111<<4)   /* Input 1 filter config = f_DTS/32, N=8 */
    #define FILTER_IC2          (0b1111<<12)  /* Input 2 filter config = f_DTS/32, N=8 */
    #define CC1EP_NOCAP_RISING  (0b00<<0)     /* CC1 polarity is positive; actual capture not enabled */
    #define CC2EP_CAP_FALLING   (0b11<<4)     /* CC2 polarity is negative; THIS IS OUR CAPTURE CHANNEL */
    #define SLAVEMODE_TRIG_TI1  (0b100<<4)    /* Timer is in slave mode, triggered by filtered/polarized TI1 (CC1) */
    #define SLAVEMODE_RESET     (0b100<<0)    /* Trigger resets the timer but doesn't stop it */

    TIM1->CCMR1 = FILTER_IC2 | CC2S_IC2_ON_TI1 | FILTER_IC1 | CC1S_IC1_ON_TI1;
    TIM1->CCER = CC2EP_CAP_FALLING | CC1EP_NOCAP_RISING;
    TIM1->SMCR = SLAVEMODE_TRIG_TI1 | SLAVEMODE_RESET;
    TIM1->PSC = F_CPU_MHz * 1000;   /* 1 ms resolution */
    TIM1->CR1 = 1;

    /* UART; transmission only */
    USART1->BRR = F_CPU_MHz * 1000000 / BAUDRATE;
    USART1->CR1 = USART_CR1_UE | USART_CR1_TE;

    uint8_t buf[11];
    uint32_t i, cnt, cap, old_cap = 0;

    while (1) {
        cap = TIM1->CCR2;
        if (cap != old_cap && cap > 10) {
            uart_send_blocking(buf, u32tod(cap, buf));
            old_cap = cap;
        }
    }
}

$ make
$ stty < /dev/ttyUSB0 115200
$ cat /dev/ttyUSB0
1546
3347
^C

$ base64 tim1capture.bin
AFAAIAkCACAPShBLmkII0A9Ig0IF0hL4ARsD+AEbmEL50QxLDEqTQgTSACED+AEbk0L70U/w4CMI
SAlJiGDD+PgtAPBHuAC/XAMAIFwDACBcAwAgXAMAIFwDACAAAgAgAO0A4HC1ACQSTgHxCwKGRqb7
AFPbCAPrgwyg60wAMDBf+oD8vvEJDyVGGEYE8QEEAvgBzevYRLFLHhgZAeAS+AHPA/gBz4NC+dEK
I6gcC1VwvQC/zczMzEmxBUoBRBNoGwb81RD4ATuIQlNg99FwRwA4AUBE9gQCHUuAtTAmT/LxJ0/w
RA5P9PpcASRFIELyCAGaYQAjF02EsNX4BCgi8A8CQvAIAsX4BCjV+AQoIvDwAkLwkALF+AQoD0oF
9TBVr2EuYsX4CODF+CjALGCQYNFgrGujQvzQCiz62QGpIEb/95D/AUYBqP/3tv8jRvDnABACQAAA
AUAAOAFA